Automatic identification system for objects or persons by remote interrogation

ABSTRACT

Automatic identification system for objects or persons by remote interrogation. The invention relates to an interrogating E/R (emitter/receiver) or gate associated with an answering E/R or tag having a digitized code identifying the same. The gate supplies four information types in the form of signals to the tags which answer &#34;yes&#34; or, by an absence of any answer, &#34;no&#34; until the gate has found their codes. When its code has been found, the tag is inhibited, thus permitting the detection of other codes. The invention more particularly applies to the monitoring of persons carrying answering E/Rs or to the billing of goods on sale in a large surface area.

BACKGROUND OF THE INVENTION

The present invention relates to an automatic identification system forobjects or persons by remote interrogation. It has numerousapplications, particularly in the field of detecting persons carryingbadges or in the accounting and/or checking of stocked goods or goodssold in stores.

In known automatic identification systems, it is possible to recognizean object or a person carrying respectively a tag or a badge providedwith a code circuit and passing under or in the vicinity of a monitoringgate. This gate then emits RF (radio frequency) pulses towards the tagor badge. These pulses are used for energizing the tag and interrogatingthe code stored therein. The code of the tag or badge carried by theobject or person is in this way recognized. Such a device is describedin EP-A-241 148.

Such systems do not make it possible to recognize in aquasi-simultaneous manner a plurality of objects or persons by thesuccessive determination of each bit constituting the code contained inthe tag or badge of said objects or persons and therefore do not make itpossible to process a large number of objects.

SUMMARY OF THE INVENTION

The object of the invention is to make it possible to detect andrecognize in a quasi-simultaneous manner all the objects or persons in agroup by simultaneously interrogating them and thus making it possibleto process a large number of objects.

The invention consists of the emission of RF signals by a gate, said RFsignals being questions to which the tags reply by a consent signal orby the absence of a signal, thus enabling the gate to determine theelements of codes contained in said group of objects. When a code hasbeen found, the tag containing said code is inhibited in order to permitthe detection of other codes.

Use will be made throughout the description and interchangeably of theterms tag, badge or answering E/R (emitter/receiver) means, as well asthe terms gate or interrogating E/R (emitter/receiver) means.

In addition, throughout the description, the term "inhibit" will beunderstood to mean the passage into a silent or inactive mode, i.e.where a tag or answering means no longer reacts.

The invention more specifically relates to an automatic identificationsystem for objects or persons by remote interrogation comprising:

interrogating E/R (emitter/receiver) means incorporating a device foremitting RF (radio frequency) signals having a modulator generatingdifferent wave shapes and a RF (radio frequency) signal reception deviceand

answering E/R means having a circuit for receiving coded informationcoming from the interrogating E/R means and the emission of an answer, asupply device and storage means in which is stored a digitized codelinked with each object or person,

characterized in that:

said answering E/R means has at least one emitting/receiving antennaforming part of said reception and emission circuit, a checking andsequencing circuit controlling all the signals necessary for a completecode search sequence and inhibiting means connected to said checking andsequencing circuit and able to inhibit the answering E/R means, and saidinterrogating E/R means being able to continuously emit a high frequencysignal, control by processing means the tasks necessary for the searchof the digitized codes delivered by the answering E/R means and store ina memory said digitized codes.

Advantageously, the inhibiting means comprise at least two flip-flops,the first flip-flop being a temporary inhibiting flip-flop able toinhibit the answering E/R means during a search sequence. The secondflip-flop is a definitive inhibiting flip-flop ensuring the inhibitionof the answering E/R means when the sought digitized code has beencorrectly received and stored by the interrogating E/R means.

These inhibiting means remain active for as long as the answering E/Rmeans are energized. When the power supply is interrupted, the answeringE/R means are again able to respond to a new interrogation sequence.

The digitized code also has an identification code of the object orperson type, an optional random subcode ensuring the unitaryidentification of the person or object in question and optionally acheck code for checking the good integrity of the transmittedinformation. These codes are not necessarily following one another andcan instead be interleaved, particularly the check code, in order tocheck the validity of information transmitted during the interrogation.

According to a feature of the invention, the storage means of theanswering E/R means comprise a code memory and an address counter ableto indicate or select each element constituting the digitized codestored in the memory, said counter being connected to the checking andsequencing circuit by a "clock" connection for controlling the advanceof the counter and a zeroing connection for indicating or selecting thefirst element of the digitized code.

According to the invention, the modulator of the interrogating E/R meansgenerates at least two wave shapes combined together to form at leastfour coded information types.

The supply or energizing device comprises a circuit for recoveringenergy coming from the interrogating E/R means.

Advantageously, the processing means of the interrogating E/R meansensuring the control of the tasks necessary for the search of thedigitized codes make it possible to perform the following stages:

a) transmitting a "start of search sequence" information correspondingto the interrogation of the first element of the digitized code,

b) awaiting the answer supplied by the answering E/R means,

c) storing in the memory of the interrogating E/R means a logic statecorresponding to the element being processed of the digitized code andtransmitting "type" information corresponding to the answer received inorder to interrogate the following code element,

d) return to stage b) up to the end of the search sequence when thefinal code element is identified,

e) verification of the validity of the digitized code received,

f) storage in said memory of the digitized code received when saidreceived code is valid and rejection of the said digitized code in theopposite case with the transmission of a "sequence start and erroneouspreceding code" information and return to stage b), and

g) return to stage a) when the received code is valid in order tointerrogate other codes until a zero code is obtained.

According to another feature of the invention, the checking andsequencing circuit of the answering E/R means makes it possible toperform the following stages:

a) reception of the "start of search sequence" pulse transmitted by theinterrogating E/R means,

b) zeroing the address counter of the storage means of the answering E/Rmeans,

c) temporary inhibiting of the answering E/R means or frequency emissionup to the reception of the next coded information coming from theinterrogating E/R means, as a function of the activity of the answeringE/R means, the logic state of the code element being processed and thetype of the last information received, activity being the opposite toinhibition,

d) incrementation of the address counter of the code storage means andchecking the value of said address with the passage to stage g) whensaid value corresponds to the final element of the processed code,

e) reception of the information transmitted by the interrogating meanscorresponding to the answer emitted by the answering E/R means in thefirst stage c) or the reception of a start of sequence information,

f) temporary inhibition of the answering E/R means up to the receptionof a "start of search sequence" information coming from theinterrogating E/R means in the case when the information received in c)by the interrogating E/R means is different from the information storedat the corresponding address in the memory of the answering E/R meansor, in the opposite case, return to stage c), and

g) definitive inhibition of the answering E/R means when the finalelement of the digitized code has been correctly transmitted orreactivation of said answering E/R means and return to stage b) in theopposite case.

The start of sequence information of stage e) can be received by theanswering means as a result of a transmission fault. In addition, thenumber of elements of the code is N, said elements carrying theaddresses from 0 to N-1.

In a preferred embodiment, the digitized code consists of a string ofbits. Moreover, the interrogating E/R means have at least three emittingantennas, each connected upstream to an emitter, said antennasfunctioning in pairs, and at least three receiving antennas eachconnected to a receiver and a demodulator downstream of which a decisionmember generates a reception signal of at least one antenna.

According to the same final embodiment, the processing means of theinterrogating E/R means ensuring the control of the tasks necessary forthe search of the digitized codes make it possible to perform thefollowing supplementary stages:

choice of an emission configuration consisting of choosing the emittingantennas to be combined with one another during the putting intooperation of the identification system,

change of emission configuration and resumption of the search sequencewhen the digitized code has not been correctly transmitted,

storage of the digitized code when said code has been considered aserroneous for at least three different emission configurations,

successive performance of all the search sequences linked with thedifferent emission configurations in order to check the total inhibitionof the answering E/R means.

By thus permitting the quasi-simultaneous detection of a large number ofobjects, the present invention consequently leads to a considerable timegain compared with the aforementioned, prior art devices.

Other advantages and features of the invention can be gathered from thefollowing illustrative, but non-limitative description. As an exampleand for describing the invention, the case of goods provided with tagsand grouped in a trolley which the customer passes under a detectiongate will be used. In this example, the system according to theinvention makes it possible to quasi-instantaneously determine and billthe goods collected in bulk within the said trolley.

BRIEF DESCRIPTION OF THE DRAWINGS

The description refers to the following drawings, wherein:

FIG. 1 diagrammatically shows the electronic circuit of the gateaccording to the invention.

FIG. 2 shows the same circuit according to a preferred embodiment of theinvention.

FIG. 3 diagrammatically shows the electronic circuit of a tag.

FIG. 4 shows the stages of the control of the tasks necessary for thesearch of the digitized codes.

FIG. 5 shows the stages performed by the checking and sequencing circuitof the tag according to the invention.

FIGS. 6A, 6B and 6C are a table showing examples of gate/tag dialog.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows the electronic circuit of the gate, which is constituted byan emission system 2, an emitting/receiving antenna 4 and a receptionsystem 6. Processing means such as a sequencing circuit 8 areresponsible for the control of the emitted signals and the receivedsignals.

In the embodiment shown in FIG. 1, the gate comprises two antennas,namely an emitting antenna 4a and a receiving antenna 4b, it beingunderstood that the said gate can have one or more antennas able toensure both emission and reception.

When a trolley carrying objects with tags arrives below the monitoringgate, the sequencing circuit 8 gives the order to modulate, by amodulator 2a, and then transmit, by an emitter 2b and the antenna 4a, aninterrogation signal to the tags. This interrogation signal isadvantageously constituted by two successively emitted bits, which phaseor frequency modulate the signal continuously emitted by the emitter 2bto the gate antenna 4a. This signal can therefore assume four stateshaving the following meanings: start of search sequence,

type 1 information signifying that at least one still active tag had acode bit at 1 at the sought address during the preceding interrogation,

type 0 information signifying that no still active tag had a code bit at1 at the sought address during the preceding interrogation,

start of search sequence, the previously received code not correspondingto a valid code.

The tags answer or respond by supplying an answer signal, which isintercepted by the antenna 4b and a receiver 6a and then demodulated bythe demodulator 6b in order to be interpreted by the sequencing circuit8.

Thus, the gate can determine the values of the different bits orelements of the codes of the objects in the trolley. When a completecode has been found, the corresponding tag is inhibited and thesequencing circuit 8 orders the recording of the code found in a memory10. The memory is the link between the electronic circuit of the gateand a not shown data processing system which permits, in the chosenapplication, the finding of the wording and the price of each article bymeans of its digitized code and then produces the bill therefrom. Theprocessing means 8 and memory 10 are advantageously constituted by amicroprocessor.

FIG. 2 shows the same electronic circuit according to a differentembodiment. Thus, this embodiment has the advantage, compared with thatof FIG. 1, of limiting the risk of poor coupling between the gate andthe tags. For this purpose use is made of three emitting antennas 4Aa,4Ba and 4Ca and three receiving antennas 4Ab, 4Bb and 4Cb orthogonal toone another.

The three receiving antennas 4Ab, 4Bb and 4Cb are connected to threereceivers 6aA, 6aB and 6aC and three demodulators 6bA, 6bB, 6bC,downstream of which there is a decision member 6c generating thedetection signal of the emission of one or more antennas 4Ab, 4Bb, 4Cb.Thus, the decision member generates a detection signal when at least oneof the three demodulators has detected an emission signal.

The three emitting antennas 4Aa, 4Ba and 4Ca are connected to threeemitters 2bA, 2bB and 2bC and operate in emission configurations of twoantennas. The two operating antennas are energized by two signals inquadrature coming from the emitters. An emission configuration is chosenand retained for as long as informations are correctly transmitted. Assoon as the transfer takes place incorrectly, another emissionconfiguration is chosen. The components of FIG. 2, identical to theirhomologs of FIG. 1, operate in the same way and are not described again.

FIG. 3 diagrammatically shows the electronic circuit of a tag. It moreparticularly comprises a receiving/emitting antenna 18 and amicrocircuit having a decoder system 12 for the reception of signalsfrom the gate, a system 14 for emitting response or answer signals, asystem 16 for recovering the energy from the gate, a checking andsequencing circuit 20, storage means 22,24 and inhibiting means 26.Advantageously, the system 16 is a rectifier bridge associated with astorage capacitor. In addition, this recovery system 16 is connected tothe different elements of the answering means. The storage meansincorporate an address counter 22 and a memory 24 and the inhibitingmeans are formed from flip-flops 26a,26b. The address counter 22 isconnected to the sequencing circuit 20 by a clock input CK and a zeroinginput RESET.

In the embodiment shown in FIG. 3, the tag comprises two antennas,namely an emitting antenna 18a and a receiving antenna 18b. Theseantennas can either be directly produced on the microcircuit, or can bedeposited on the printed circuit on which the microcircuit is placed.

The checking and sequencing circuit 20 makes it possible to control theinformation received and the information to be transmitted. This circuit20 also increments the address counter 22 and ensures the operation ofthe inhibiting flip-flops 26. The code memory 24 containing thedigitized tag code is connected at its input to the address counter 22and at its output to the checking and sequencing circuit 20.

An interrogation signal transmitted by the gate is received by thereceiving antenna 18b, decoded by the decoder 12 and the thus decodedinformation is transmitted to the checking and sequencing circuit 20,which controls and checks the information received. The sequencingcircuit 20 decides on the answer to be transmitted, the incrementationof the address counter 22 and the passage of the tag into the inhibitedmode. The answer to be emitted is then transmitted to the emitter 14,which delivers the answer signal to the gate. In parallel, the energyrecuperating means 16 transforms the energy received from the gate intoa supply voltage for the tag electronic circuit.

FIG. 4 shows the control stages with regards to the tasks necessary forthe search for the digitized codes, such as are used by the gate.

A first stage 100 consists of starting the search sequence. This searchsequence for a code starts at 102 when the presence of a trolley isdetected beneath the gate. This sequence can start automatically or bymechanical actuation. A "start of search sequence" signal 104corresponding to the interrogation of the first code element is thensupplied to the tags. At 106 the system awaits the answer from saidtags.

A second, choice stage 200 is then initiated as a function of the answerreceived. The choice 202 takes place in the following way. If the answerreceived is positive, a 1 is stored 204 in the gate memory 10 and then atype 1 information 206 is transmitted to the tags. If the answerreceived is negative, a 0 is stored 208 in the memory 10 and a type 0information 210 is transmitted.

A third stage 300 consists of checking 302 if the received code iscomplete. If the code is complete and valid 304, then said code isstored at 310 in the gate memory 10. If it is complete and erroneous,said code is rejected 306 and a "start of sequence-erroneous code"message 308 is transmitted as the answer at 106. When the received codeis incomplete, the search sequence continues at 106.

A fourth stage 400 consists of the reception of the code following itsstorage. The code is checked 402. Then the code is zero, the searchsequence ends in 404. When it is not zero, the search sequence continueswith the transmission of a new "start of search sequence" signal at 104.

In the embodiment according to FIG. 2, a few supplementary stages arenecessary. An antenna emission configuration is adopted during the firststage 100 and retained whilst the transfer of the codes takes placecorrectly. As soon as this transfer is no longer correct, theconfiguration is modified. However, if the same erroneous code istransferred with the three different emission configurations, thecorresponding tag is assumed to be incorrectly programmed and thereceived code is assumed to be valid and the tag is then inhibited.

This embodiment of the invention permits a supplementary check of theend of the search sequence, namely the performance of three completesearch sequences according to the three emission configurations in orderto check whether all the tags have been inhibited.

FIG. 5 shows the different stages performed by the checking andsequencing circuit 20 on each tag.

A first stage 500 consists of starting 502 the search sequence onenergizing the tag and the reception 504a of the "start of searchsequence" signal and the zeroing of the address counter in 504b. Asecond stage 600 consists of choosing 602 the bit of information of thecode at address Ad to be emitted 604 in response to the interrogation602 from the gate.

A third stage 700 consists of checking 704 which bit of the code isbeing processed. The address counter Ad is incremented 702, Ad=Ad+1. Atthe end of the processing in 704 of the last bit of the code, if theprocessed code has been validated by the gate, the tag receives 708 fromthe gate a start of sequence information with passage 710 into thedefinitive inhibiting mode of the processed tag, in order to permit theinterrogation of the other tags. If the processed code is not validatedby the gate, the tag receives 712 from the gate a start of sequenceinformation with erroneous acquisition, which brings about a return tostage 504b.

When the processed bit is not the final bit of the code, the tagreceives a type 1 information 718 emitted by the gate if the latter hasdetected an answer 604 of at least one tag during the interrogation ofthe address (Ad-1), or a type 0 information 716 emitted by the gate, ifthe latter has detected no answer during the interrogation of theaddress (Ad-1). If the information received here is neither of type 1,nor of type 0, but a start of sequence information 714 as a result of atransmission fault, there is a return to stage 504b in order toreinitialize the interrogation.

If the code bit at the previously processed address (Ad-1) does notcontain the information of the received type 720, 722, the tag istemporarily inhibited 724 up to the reception of a start of sequenceinformation 504a. In the opposite coarse, there is a return to stage600, where the tag transmits an answer in the form of a signal when thecode bit at the processed address Ad contains a 1 does not transmit asignal in the opposite case.

On the attached table, FIGS. 6A, 6B and 6C, is shown the gate/tag dialogin an example of three tags E1, E2 and E3 with a respective code havingfive elements 01100, 01010 and 00111, the first bit, e.g. being theleft-hand bit. The gate electronic circuit modulator 2a generates twowave shapes. The combination of these two wave shapes makes it possibleto define four information types. In the considered example, theinformations 00, 01, 10, and 11 respectively signify, as statedhereinbefore, "start of search sequence", "type 0 information"indicating that the bit processed during the preceding interrogation isnot equal to 1 for any active tag, "type 0 information" indicating thatthe bit processed during the preceding interrogation is not equal to 1for any active tag, "type 1 information" indicating that at least onetag processed during the preceding interrogation has its bit at 1, and"start of search sequence with erroneous preceding code".

The gate emits a given information signal in the first column of theattached table. The tags reply to this signal by a binary answer meaningyes or no, i.e. the tags transmit a signal for yes or transmit no signalfor no. The interpretation of each gate/tag exchange is given in thefinal column of the table.

In a more practical manner and with a view to detecting the presence oftransmission errors and possibly for correcting these errors, it ispossible to add correction bits to the bits defining the tag code.

The tags associated with such a gate can be of different types, i.e. canhave different electronics for "conversing" with the gate. For example,said tags can have an E/R device able on the one hand to respond, on afrequency F/k (k being a prime number) to the signals transmitted by thegate on a frequency F, and on the other hand, can be inhibited when itscode has been found by the gate in order to permit the search for othercodes.

Apart from the advantages described hereinbefore, in the special case ofan application to the sale of goods in a large area, the inventionenables customers to record the chosen articles. Therefore the inventionavoids waiting in long lines at the checkouts, where the cashier has toidentify each article individually. Clearly this application has onlybeen given in an illustrative manner. The invention is applicable tonumerous other fields for the identification of a person or an object.

We claim:
 1. System for the automatic identification of objects orpersons by remote interrogation comprising interrogating E/R(emitter/receiver) means adapted to continuously emit a radio frequencysignal and answering E/R means associated with each of the objects orpersons, said answering E/R means comprising:a reception and emissioncircuit (12, 18) adapted to receive radio frequency signals carryingcoded information from the interrogating E/R means, adapted to emitradio frequency signals carrying an answer, and including at least oneemitting/receiving antenna (18), an energizing device (16), and storagemeans in which is stored a digitized code linked with the respectiveobject or person; said interrogating E/R means comprising: a device (2b,4) for emitting the radio frequency signals carrying the codedinformation, a device (4, 6) for receiving the radio frequency signalscarrying the answer from the answering E/R means, and a modulator (2a)generating different wave shapes to be emitted in the radio frequencysignals carrying the coded information, processing means adapted tocontrol a search of the digitized code that is transmitted in the answerby the answering E/R means, and a memory adapted to store digitizedcodes received in the answer, characterized in that the answering E/Rmeans also comprise: a checking and sequencing circuit (20) adapted tocontrol answer signals that answer the coded information signalstransmitted by the interrogating E/R means, a code search sequence beingdefined by the signals exchanged between the interrogating E/R means andthe answering E/R means for determining if a code received by theinterrogating E/R means is a code being searched for by the processingmeans, and inhibiting means (26) connected to said checking andsequencing circuit and adapted to either temporarily inhibit ordefinitively inhibit the answering E/R means responsive to theinterrogating E/R means, said inhibiting means incorporating at leastfirst and second flip-flops, the first flip-flop (26a) being a temporaryinhibiting flip-flop adapted to temporarily inhibit the answering E/Rmeans during the search sequence when the answering E/R means determinesthat the digitized code being searched for is not the code stored in itsstorage means and the second flip-flop (26b) being a definitiveinhibiting flip-flop ensuring definitive inhibition of the answering E/Rmeans when the digitized code being searched for has been correctlyreceived and stored by the interrogating E/R means.
 2. Identificationsystem according to claim 1, characterized in that the digitized codecomprises at least one of a code identifying a "type" of object orperson, a random subcode ensuring unitary identification of the objector person and a check code for checking the integrity of the transmittedinformation.
 3. Identification system according to either of the claims1 or 2, characterized in that the storage means of the answering E/Rmeans comprises a code memory (24) and an address counter (22) adaptedto indicate each element of a digitized code stored in the storagemeans; said counter having a clock input connected to a clock signal ofthe checking and sequencing circuit controlling the advance of thecounter and a reset input connected to a zeroing output of the checkingand sequencing circuit for indicating a first element of the digitizedcode.
 4. Identification system according to either of the claims 1 or 2,characterized in that the modulator of the interrogating E/R meansgenerates at least two wave shapes combined together to form at leastfour "types" of the coded information emitted from the interrogating E/Rmeans.
 5. Identification system according to either of the claims 1 or2, characterized in that the energizing device comprises a circuit forthe recovery of energy carried by the radio frequency signals receivedfrom the interrogating E/R means.
 6. Identification system according toeither of the claims 1 or 2, characterized in that the processing meansof the interrogating E/R means is adapted for controlling the search ofthe digitized codes according to the following stages:a) transmitting a"start of search sequence" pulse corresponding to interrogation of afirst element of the digitized code, b) awaiting an answer from theanswering E/R means, c) storing in the memory of the interrogating E/Rmeans a logic state corresponding to the element of the digitized codebeing interrogated and transmitting "type" information corresponding tothe answer received in order to interrogate a next code element, d)returning to stage b) and continuing until an end of the search sequencewhen a final code element is identified, e) verifying validity of thedigitized code received, f) storing in said memory the digitized codereceived when said received code is valid and rejecting said digitizedcode in the opposite case with the transmission of a "sequence start anderroneous preceding code" information and returning to stage b) when thecode is rejected, and g) returning to stage a) when the received code isvalid in order to interrogate other codes until a zero code is obtained.7. Identification system according to claim 6, characterized in that theanswering E/R means is in an activity state being one of an active stateand an inhibited state and the checking and sequencing circuit of theanswering E/R means is adapted to perform the following stages:a)receiving the "start of search sequence" pulse transmitted by theinterrogating E/R means, b) zeroing an address counter of the storagemeans of the answering E/R means, c) temporarily inhibiting theanswering E/R means until the: reception of the next coded informationcoming from the interrogating E/R means, depending on the activity stateof the answering E/R means, a logic state of the code element beinginterrogated and the "type" of the last information received from theinterrogating E/R means, d) incrementing an address of the addresscounter of the code storage means, checking the address, and passing tostage g) of claim 7 when said address corresponds to the final elementof the interrogated code, e) receiving the "type" of the lastinformation transmitted in stage c) of claim 7 by the interrogatingmeans corresponding to the answer emitted by the answering E/R means orreceiving a "start of search sequence" pulse, f) temporarily inhibitingthe answering E/R means until the reception of a "start of searchsequence" pulse coming from the interrogating E/R means in the case whenthe last information received in c) of claim 7 from the interrogatingE/R means is different from the information stored at the correspondingaddress in the storage means of the answering E/R means or, in theopposite case, returning to stage c) of claim 7, g) definitivelyinhibiting the answering E/R means when the final element of thedigitized code has been correctly transmitted by the answering E/R meansor reactivating said answering E/R means and returning to stage b) ofclaim 7 in the opposite case.
 8. Identification system according toeither of the claims 1 or 2, characterized in that the digitized codesconsist of strings of bits.
 9. Identification system according to eitherof the claims 1 or 2, characterized in that the interrogating E/R meanscomprise at least three emitting antennas (4Aa, 4Ba, 4Ca) each connecteddownstream of an emitter (2bA, 2bB, 2bC), said antennas operating inpairs, and at least three receiving antennas (4Ab, 4Bb, 4Cb) eachconnected to a receiver (6aA, 6aB, 6aC) and to a demodulator (6bA, 6bB,6bC) downstream of which a decision member (6c) generates a detectionsignal when a signal is received by at least one of the antennas. 10.Identification system according to claim 9, characterized in that theprocessing means of the interrogating E/R means is adapted forcontrolling the search of the digitized codes according to the followingstages:choosing an emission configuration by choosing a combination ofthe emitting antennas to be used during operation of the identificationsystem, changing the emission configuration and resuming the searchsequence when the digitized code has not been correctly transmitted bythe answering the E/R means, storing the digitized code when said codehas been determined to be erroneous for at least three differentemission configurations, and successively performing the search sequenceusing different emission configuration in order to check the definitiveinhibition of the answering E/R means.